As is known in the art, many modem analog CMOS (Complementary Metal-Oxide Semiconductor) circuits employ temporary analog storage to counteract circuit offsets and store signal variables and implement adaptation and learning. Offset correction and signal storage are common applications of temporary analog storage due to their widespread use in switched capacitor circuits, and straightforward implementation is possible using only a capacitor and a MOS switch. This form of storage is a very compact, low-power, and precise storage technique, but is useful only for relatively short time scales since the OFF state leakage of the MOS switch quickly degrades the stored charge.
So-called medium-term capacitive storage cells extend the storage time of short-term cells by reducing MOS switch leakage, and are often used in adaptive circuit design. Many leakage-reduction techniques have been proposed. However, these techniques do not focus on characterizing the switch leakage as a function of terminal voltages.
Long-term cells extend the storage times of short-term cells by completely counteracting MOS leakage rather than simply reducing it. Some cells counteract leakage by periodically quantizing the capacitor voltage using some form of analog-to-digital conversion. This scheme has the disadvantages of added circuit complexity and power due to both the analog-to-digital converter and the bussing required for multiplexing the converter between cells. A further long-term storage approach is to eliminate the MOS switch altogether by employing floating-gate technology. Disadvantages of this scheme include high voltages required for writing to the cells, slow write times, and additional supporting circuitry and bussing to accomplish the writing.